#2nd attempt at shortening the code
#Assumes r10 is safe for use
#Assumes cr5 thru cr7 are safe for use
lbz r4, 0x7 (r31) #Load ??? byte
subi r10, r4, 1 #Copy r4's value to r10 but subtract 1 from it as well
li r12, 4 #Set loop amount
mtctr r12
lis r12, 0x803A #Set upper half of ??? address
ori r12, r12, 5462 #Too lazy to convert this hex. It 6862 - 1400. Since in the original source that you posted, each check done on 803Axxxx was incremented by 1400 every time
loop:
addi r10, r10, 1 #Increment r10 by 1
cmpw cr7, r10, r4 #Check if r4 is equal to 0, 1, 2, or 3, place result in cr7
lwzu r11, 1400 (r12) #Load 1400 offset of r12, increment r12 to next load address
cmpwi cr6, r11, 0x1000 #Check that only bit 19 is high, all other bits must be low. Place result in cr6.
crand 4*cr7+eq, 4*cr6+eq, 4*cr7+eq #Logically AND's cr6 EQ bit with cr7 EQ bit, result placed back in cr7 EQ bit. If cr7 EQ bit results as high, then both earlier comparisons were true.
beq- cr7, do_final_check #If both earlier two checks passed, we're onto final check
bdnz+ loop #Decerment Loop
b original_instruction
#NOTE I can probably do more "condition register/field" trickery to where we don't need the follow segment of code separated from the loop, thus shortening the code even more
do_final_check:
mr r4, r0
addi r4, r4, 1
cmplwi r4, 7
ble- store_it
li r4, 0
store_it:
stw r4, 5344 (r31)
original_instruction:
lwz r4, 5344 (r31)
#Assumes r10 is safe for use
#Assumes cr5 thru cr7 are safe for use
lbz r4, 0x7 (r31) #Load ??? byte
subi r10, r4, 1 #Copy r4's value to r10 but subtract 1 from it as well
li r12, 4 #Set loop amount
mtctr r12
lis r12, 0x803A #Set upper half of ??? address
ori r12, r12, 5462 #Too lazy to convert this hex. It 6862 - 1400. Since in the original source that you posted, each check done on 803Axxxx was incremented by 1400 every time
loop:
addi r10, r10, 1 #Increment r10 by 1
cmpw cr7, r10, r4 #Check if r4 is equal to 0, 1, 2, or 3, place result in cr7
lwzu r11, 1400 (r12) #Load 1400 offset of r12, increment r12 to next load address
cmpwi cr6, r11, 0x1000 #Check that only bit 19 is high, all other bits must be low. Place result in cr6.
crand 4*cr7+eq, 4*cr6+eq, 4*cr7+eq #Logically AND's cr6 EQ bit with cr7 EQ bit, result placed back in cr7 EQ bit. If cr7 EQ bit results as high, then both earlier comparisons were true.
beq- cr7, do_final_check #If both earlier two checks passed, we're onto final check
bdnz+ loop #Decerment Loop
b original_instruction
#NOTE I can probably do more "condition register/field" trickery to where we don't need the follow segment of code separated from the loop, thus shortening the code even more
do_final_check:
mr r4, r0
addi r4, r4, 1
cmplwi r4, 7
ble- store_it
li r4, 0
store_it:
stw r4, 5344 (r31)
original_instruction:
lwz r4, 5344 (r31)