Coding Questions and other Quandaries

[Vega]

Mine does have 10 configs, the source clearly shows that. And on the compiled code there's 12 1/2 words of null. 12 1/2 words converted to bytes is 100.

Either way, I'm surprised it works. My usual rough draft sources always have some blunder present somewhere. I have a tendency of making silly mistakes

For making random pins, a simple way would be using the Time Base. Since we need ten pin configs and the pin value as a byte can only be 0x00 or 0x01, we can use a stream of 10 bits for the random pin sequence. We'll use the least significant (far right) 10 bits of the time base. It's random 'enough' to get the job done.

Here's the code and source where you update the pin config based on the typical button activator like the last source.

C0000000 0000000D
3C608071 A0038D40
7000XXXX 3C608000 #XXXX = button activator
40820010 38000000
980303FF 4E800020
880303FF 2C000001
4D820020 38000001
980303FF 7C0C42E6
700003FF 3C608126
606396B9 38A0000A
7CA903A6 5400083C
5400F87E 540507FE
9CA3057C 4200FFF4
4E800020 00000000

Source:

Code:

#Get button(s) pressed, check against desired activator
lis r3, 0x8071
lhz r0, 0xFFFF8D40 (r3)
andi. r0, r0, 0xXXXX #Your desired button(s)
lis r3, 0x8000 #Before taking the branch, set r3 to its new value, upper 16 bits of EVA
bne- button_has_been_pressed

#Nothing Pressed, Reset Button Status
li r0, 0
stb r0, 0x3FF (r3)
blr #End C0

#Button Pressed, Adjust Button Status
#0 = Not Pressed
#1 = Pressed
button_has_been_pressed:
lbz r0, 0x3FF (r3)
cmpwi r0, 1
beqlr- #End C0
li r0, 1
stb r0, 0x3FF (r3)

#Grab Timebase Lower 32bits
mftbl r0

#Leave only the right side 10 bits for the pin config
andi. r0, r0, 0x03FF

#Setup Loop 1st time store address for stbu
lis r3, 0x8126 #(0x81269C35 minus 0x57C = 0x812696B9)
ori r3, r3, 0x96B9

#Set loop amount
li r5, 10
mtctr r5

#Shift the Time Base over to the left by 1 (for prep with shifting in loop iterations)
slwi r0, r0, 1

#The loop

#Shift what's in r0 by 1 bit to the right
shift_and_store_loop:
srwi r0, r0, 1

#Leave only bit 31 leftover
clrlwi r5, r0, 31

#Store the pin config bit as a byte; update the storing address by 0x57C every time
stbu r5, 0x057C (r3)
bdnz+ shift_and_store_loop

#End C0
#blr #Uncomment if NOT compiling with pyiiasmh, adjust compiled code accordingly