Coding Questions and other Quandaries

[Vega]

Code:

  mr r12, r30 #ASM r30 holds the item address minus 0x150
  lis r11, 0x8000
  stw r12, 0x3F0 (r11)

You can get rid of the mr instruction and change the stw instruction stw r30, 0x03F0 (r11). The Destination Register's value always remains intact during a store instruction.

At the beginning of the second race, There was an unexpected address (mem1) written there.
Will probably have to add a double check to that portion of the code.

But all in all, it does what I was hoping to do.
All ASM, no filler!!!

Code:

andis. rD, rA, 0x1000
beq- mem1