AArch64/ARM64 Tutorial

Chapter 15: Extra Instruction Features

Some instructions can have an additional shift applied to the final/far-right source register or to the immediate value. The shift is applied before it is used to compute the rest of the instruction.

The shift can be lsl, lsr, ror, or asr. Here are the ranges...

Non-Extended Register:
0 thru 31

Extended Register:
0 thru 63

Example:
add w1, w2, w3, lsl #3

The above instruction will....

  1. Do a Logical Shift of 3 bits on w3's value
  2. Then that new w3 value will be added with w2
  3. Result of the addition is placed in w1

The following instructions are the *only* instructions that can use this feature...

In previous chapters, I've mentioned that instructions like add, orr, cmp, etc etc are limited to Immediate Value ranges or rules. Well since this extra shift can be applied to the Immediate Value, it allows us to use more than just the typical ranges/rules. We also do not need to type out the extra shifting feature. The Assembler will do the work for us.

Example:
add w1, w2, #0x440000

Obviously 0x440000 exceeds the Unsigned 12-bit Immediate Value rule for add. This instruction is actually....

add w1, w2, #0x440, lsl #12

As you can see, this is a valid instruction. 0x440000 is just 0x440 logically shifted left by 12 bits.


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