For a float instruction that simultaneously also updates cr1 (i.e. fadds. f0, f0, f1), is the float comparison Ordered or Unordered? Thanks in advance.
According to IBM docs,
> If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Floating-Point Exception Summary (FX), Floating-Point Enabled Exception Summary (FEX), Floating-Point Invalid Operation Exception Summary (VX), and Floating-Point Overflow Exception (OX) bits in Condition Register Field 1.
I don't think it does any float comparison at all.